2019
Fully-Asynchronous Cache-Efficient Simulation of Detailed Neural Networks
Magalhães B, Sterling T, Hines M, Schürmann F. Fully-Asynchronous Cache-Efficient Simulation of Detailed Neural Networks. Lecture Notes In Computer Science 2019, 11538: 421-434. DOI: 10.1007/978-3-030-22744-9_33.Peer-Reviewed Original ResearchRuntime systemNeural networkScientific applicationsLarge-scale scientific applicationsAsynchronous runtime systemHPX runtime systemParalleX execution modelOverlap of computationLinear data structuresBetter cache localityCompute architecturesExecution modelParallel executionCore kernelsData structureCache localitySynchronous executionMemory spaceCache levelsNode levelBenchmark resultsExecutionLower timeNumber of timestepsNetworkExploiting Flow Graph of System of ODEs to Accelerate the Simulation of Biologically-Detailed Neural Networks
Magalhães B, Hines M, Sterling T, Schürmann F. Exploiting Flow Graph of System of ODEs to Accelerate the Simulation of Biologically-Detailed Neural Networks. 2019, 00: 176-187. DOI: 10.1109/ipdps.2019.00028.Peer-Reviewed Original ResearchCompute nodesScientific use casesHPX runtime systemParalleX execution modelSingle compute nodeLarge-scale benchmarksGranularity of parallelismCompute architecturesRuntime systemAsynchronous executionExecution modelUse casesData implementationParallel simulatorNeural networkScientific applicationsFlow graphDifferent architecturesStrong scalingCore requirementsConcurrent outputArchitectureFlow dependencyParallelismLarge systems
2016
Leveraging a Cluster-Booster Architecture for Brain-Scale Simulations
Kumbhar P, Hines M, Ovcharenko A, Mallon D, King J, Sainz F, Schürmann F, Delalondre F. Leveraging a Cluster-Booster Architecture for Brain-Scale Simulations. Lecture Notes In Computer Science 2016, 9697: 363-380. DOI: 10.1007/978-3-319-41321-1_19.Peer-Reviewed Original ResearchCluster-Booster architectureComplex scientific workflowsBrain-scale simulationsIntel MIC platformIntel Xeon Phi coprocessorXeon Phi coprocessorType of architectureSupercomputing architecturesScalable partScientific workflowsIntel MICStampede supercomputerCompute EngineCompute kernelsMIC platformData structureDevelopment workflowImplementation detailsScientific applicationsArchitecture performanceCore simulatorArchitectureEntry platformDeep platformPlatform