Abhishek Bhattacharjee
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A. Bartlett Giamatti professor of Computer Science
Biography
I am an Associate Professor of Computer Science at Yale University. My group studies computer architectures and systems for platforms ranging from data center servers to brain-computer interfaces. I am part of Yale's Computer Systems Lab and Interdepartmental Neuroscience Program, and am also a Fellow of Grace Hopper College.
Modern computer systems integrate diverse accelerators and memory technologies, offering significant performance but complicating the programming models that software developers are familiar with. We build systems abstractions to improve hardware programmability, and architect hardware and systems software support to implement these abstractions efficiently.
We have worked on the virtual memory abstraction with contributions to translation contiguity, memory transistency, and GPU address translation. Our work on coalesced TLBs has been integrated into AMD's chips, and our large page optimizations are now in Linux. Our work on giving GPUs direct access to storage, networking, and memory management services has influenced Radeon Open Compute's hyperscale computing stack.
We have also been building heterogeneous architectures that advance the brain sciences to help treat neurological disorders and offer a path towards more explainable and transparent AI. In our HALO project, we are taping out ultra-low-power and flexible chips for brain-computer interfaces and evaluating them using data collected on non-human primates and epilepsy patients.
Appointments
Computer Science
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Research
Publications
2024
Distributed Brain-Computer Interfacing with a Networked Multi-Accelerator Architecture
Pothukuchi R, Sriram K, Gerasimiuk M, Ugur M, Manohar R, Khandelwal A, Bhattacharjee A. Distributed Brain-Computer Interfacing with a Networked Multi-Accelerator Architecture. IEEE Micro 2024, PP: 1-10. DOI: 10.1109/mm.2024.3411881.Peer-Reviewed Original ResearchMosaic Pages: Big TLB Reach with Small Pages
Han J, Gosakan K, Kuszmaul W, Mubarek I, Mukherjee N, Sriram K, Tagliavini G, West E, Bender M, Bhattacharjee A, Conway A, Farach-Colton M, Gandhi J, Johnson R, Kannan S, Porter D. Mosaic Pages: Big TLB Reach with Small Pages. IEEE Micro 2024, PP: 1-8. DOI: 10.1109/mm.2024.3409181.Peer-Reviewed Original Research
2023
CryptoMMU: Enabling Scalable and Secure Access Control of Third-Party Accelerators
Alam F, Lee H, Bhattacharjee A, Awad A. CryptoMMU: Enabling Scalable and Secure Access Control of Third-Party Accelerators. 2023, 32-48. DOI: 10.1145/3613424.3614311.Peer-Reviewed Original ResearchMemory management unitSecure access controlThird-party intellectual propertyGeneral-purpose processorsCryptography-based approachesCustom acceleratorsEdge devicesHardware acceleratorsAccess controlIntellectual propertySoftware changesArt solutionsGood scalabilityMemory accessCloud systemsData centersData structureChip acceleratorsDesign timeO devicesReconfigurable logicSystem integratorsSignificant performanceSystem throughputEvaluation results