2024
Distributed Brain–Computer Interfacing With a Networked Multiaccelerator Architecture
Pothukuchi R, Sriram K, Gerasimiuk M, Ugur M, Manohar R, Khandelwal A, Bhattacharjee A. Distributed Brain–Computer Interfacing With a Networked Multiaccelerator Architecture. IEEE Micro 2024, 44: 106-115. DOI: 10.1109/mm.2024.3411881.Peer-Reviewed Original Research
2023
CryptoMMU: Enabling Scalable and Secure Access Control of Third-Party Accelerators
Alam F, Lee H, Bhattacharjee A, Awad A. CryptoMMU: Enabling Scalable and Secure Access Control of Third-Party Accelerators. 2023, 32-48. DOI: 10.1145/3613424.3614311.Peer-Reviewed Original ResearchMemory management unitSecure access controlThird-party intellectual propertyGeneral-purpose processorsCryptography-based approachesCustom acceleratorsEdge devicesHardware acceleratorsAccess controlIntellectual propertySoftware changesArt solutionsGood scalabilityMemory accessCloud systemsData centersData structureChip acceleratorsDesign timeO devicesReconfigurable logicSystem integratorsSignificant performanceSystem throughputEvaluation results